At the Rochester Institute of Technology, a freshmen laboratory project, utilizing a NOR logic array and the existing PMOS process, has been successfully incorporated into the microelectronic engineering curriculum. This paper outlines the structure of this new course. Students are introduced to digital logic and I.C. fabrication by designing a simple digital circuit and realizing it in the gate array. Completion of the circuit is accomplished by making a mask and photolithographically defining the metal layer. The circuits are then tested for functionality.
Electrical Engineering (MS)
Department, Program, or Center
Electrical Engineering (KGCOE)
Lemmond, Theodore, "Four input nor gate array for EMCR210" (1987). Thesis. Rochester Institute of Technology. Accessed from
RIT – Main Campus