CMOS image sensors have been around since the 1960's. However due to poor light sensitivity and poor signal-to-noise ratios (SNR) the architecture was not popular. Since then many improvements have been made to the architecture, making camera designs that use CMOS imagers more prevalent. Much of the improvement in SNR has been due to fixed-pattern noise reduction. Correlated double sampling (CDS) is a popular technique to reduce the effects of this source of noise. The circuitry required to implement CDS can be complex and hinders other areas of an image sensor performance in some schemes. This thesis proposes a new technique that attenuates noise due to DC offset without the use of CDS.
Beginning with a standard three transistor-per-pixel architecture, this thesis builds on previous CMOS image sensor designs and creates a new bi-directional amplifier architecture that eliminates DC offset due to transistor mismatch without the use of CDS. The architecture uses a single differential amplifier to both reset and readout the pixel. Simulations show that SNR range of the proposed column sensor is 48.71 - 44.63 dB, whereas an Active Column Sensor without CDS has an SNR of 31.88 - 28.78 dB under the same conditions.
Using the proposed column sensor, a layout (TSMC 0.35um) for a small 4X4 pixel image sensor was designed and prototyped which proves that the bi-directional amplifier can be used as a column sensor. The proposed prototype shows the viability of the architecture for a future production camera. The simulated result for the image sensor show that it can be reset in 200 ns read out in 3.4us and has an overall size of 107.9X118.1 um2.
Library of Congress Subject Headings
Metal oxide semiconductors--Design and construction; Imaging systems--Image quality; Electronic noise
Computer Engineering (MS)
Department, Program, or Center
Computer Engineering (KGCOE)
Thorpe, Philip D. II, "CMOS image sensor with bi-directional column sensor" (2006). Thesis. Rochester Institute of Technology. Accessed from
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