Line edge roughness (LER) is seen as one of the most crucial challenges to be addressed in advanced technology nodes. In order to alleviate it, several options were explored in this work for the interference-like lithography imaging conditions.
The most straight forward option was to scale interference lithography (IL) for large field integrated circuit (IC) applications. IL not only serves as a simple method to create high resolution period patterns, but, it also provides the highest theoretical contrast achievable compared to other optical lithography systems. Higher contrast yields a smaller transition region between the low and high intensity parts of the image, therefore, inherently lowers LER. Two of the challenges that would prohibit scaling IL for large field IC applications were addressed in this work: (1) field size limitations, and (2) magnification correction (i.e., pitch fine-tuning) ability.
Experimental results showed less than 0.5 nm pitch adjustment capability using fused silica wedges mounted on rotational stages at 300 nm pitch pattern. A detailed discussion on maximum practical IL field size was outlined by considering the subsequent trim exposures and optical path difference effects between the interfering diffraction orders. The practical limit on the IL field size was assessed to be 10 mm for the conditions specified in this work.
One of the contributors of LER is the mask absorber roughness. To mitigate it, two methods were explored that are also applicable to scanners working under interference-like conditions: (1) aerial image averaging via directional translation, and (2) pupil plane filtering. Experiments on pupil plane filtering approach were performed at Imec in Leuven, Belgium, on the ASML:NXT1950i scanner equipped with FlexWAVE wavefront manipulator. Utilizing an optimized phase filter at the pupil plane and a programmed roughness mask, the transfer of 200 nm roughness period to the wafer plane was eliminated. This mitigation effect was found to be strongly dependent on the focus.
Library of Congress Subject Headings
Nanolithography; Imaging systems--Image quality
Microsystems Engineering (Ph.D.)
Department, Program, or Center
Microsystems Engineering (KGCOE)
Bruce W. Smith
Baylav, Burak, "Reduction of Line Edge Roughness (LER) in Interference-Like Large Field Lithography" (2014). Thesis. Rochester Institute of Technology. Accessed from
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