Interconnection networks for multi/many-core processors or server systems are the backbone of the system as they enable data communication among the processing cores, caches, memory, and other peripherals. Given the criticality of the interconnects, the system can be severely subverted if the interconnection is compromised. The threat of Hardware Trojans (HTs) penetrating complex hardware systems such as multi/many-core processors are increasing due to the increasing presence of third-party players in a System-on-chip (SoC) design. Even by deploying native HTs, an adversary can exploit the Network-on-Chip (NoC) backbone of the processor and get access to communication patterns in the system. This information, if leaked to an attacker, can reveal important insights regarding the application suites running on the system; thereby compromising the user privacy and paving the way for more severe attacks on the entire system. In this paper, we demonstrate that one or more HTs embedded in the NoC of a multi/many-core processor is capable of leaking sensitive information regarding traffic patterns to an external malicious attacker, who, in turn, can analyze the HT payload data with machine learning techniques to infer the applications running on the processor. Furthermore, to protect against such attacks, we propose a LUT based obfuscation method. The proposed defense can obfuscate the attacker’s data processing capabilities to infer the user profiles successfully. Our experimental results demonstrate that the proposed obfuscation could reduce the accuracy of identifying user profiles by the attacker from >99% to <8% in multi/many-core systems.
Computer Engineering (MS)
Department, Program, or Center
Computer Engineering (KGCOE)
Sai Manoj Pudukotai Dinakarrao
Mountford, Thomas, "Address Obfuscation to Protect Against Hardware Trojans in Network-on-Chips" (2022). Thesis. Rochester Institute of Technology. Accessed from
RIT – Main Campus
Available for download on Thursday, December 21, 2023