Abstract

A reliable process for the fabrication of active heater components on passive silicon photonic integrated circuits is presented in this thesis. The heater components enable modulation of the photonic circuits’ optical response through the concept of Joule heating. This thesis proposes and successfully establishes an optimized process that can be entirely carried out in an academic clean room facility. The entire cycle of design, simulation and modelling, fabrication and testing is covered. Target lithographic resolution of 300 nm was achieved through process optimization (using a spin on carbon hard mask) by using i-line 365 nm lithography. A very good resolution supported by a near-uniform silicon etch enabled successful fabrication and testing of 30 chips (out of the total 36 chips (~80%)) on a 6” wafer. The second target was the successful demonstration of thermal tuning capabilities using a resistive metal heater made from 50 nm Titanium (primary) and 150 nm Aluminum (wire) (bi-layer). A full FSR (Free Spectral Range) shift of 7 nm was measured on a 400 nm double-bus ring resonator (without modulation) and a complete 7 nm shift was achieved on the same circuit with a power supply of 6V at resistance of ~700 Ω. For a 6 dBm (3.98 mW) laser supply, a -25 dBm (0.003 mW) output was measured on a basic loop-back circuit with a propagation loss of -28 dBm. The testing results in this thesis are supported by images from optical microscopes, Scanning Electron Microscopy (SEM) and simulations from Lumerical MODE, DEVICE, FDTD and INTERCONNECT solutions.

Publication Date

8-2019

Document Type

Thesis

Student Type

Graduate

Degree Name

Microelectronic Engineering (MS)

Department, Program, or Center

Microelectronic Engineering (KGCOE)

Advisor

Stefan Preble

Advisor/Committee Member

Robert Pearson

Advisor/Committee Member

Dale Ewbank

Campus

RIT – Main Campus

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