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Authors

Todd C. Sieger

Publication Date

1991

Document Type

Paper

Abstract

Polysilicon emitter vertical NPN transistors were fabricated in an attempt to create devices with very high current gains and high forward Early voltages. TMA SUPREM-3 simulations were used to optimize the process to obtain emitter junction depths of 0.05 and 0.08um. Final emitter junction depths of 0.1um, or less, were measured. High current gains were not achieved, due to high base doping.

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