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Publication Date

4-2019

Document Type

Paper

Abstract

The goal of this project was to initially re-establish a baseline process for the fabrication of Indium-Gallium-Zinc Oxide thin-film transistors, shown in Figure 1, that have been a part of ongoing research here at RIT. After bringing the fabricated devices back into a reliable process, capping layer differences were investigated to determine their effects on device thermal stability. The time of the passivation layer anneal was varied between 3 and 4 hours for the primary lot and the temperature of the ALD capping layer was varied between 150°C and 200°C. The devices were tested and then thermally stressed on a hot plate for an hour at 140°C and 200°C. From the initial testing, it was shown that devices with 200°C ALD and with a 3 hour anneal had the best performance were the most thermally stable. After testing I-V characteristics, a length dependency was also found from the thermal stability in which the shorter devices remained operational after stress, whereas, longer devices became short circuits.

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