A dynamic AND - dynamic OR type of PLA was designed using a CMOS process and the layout was done on a CALMA system using l.5um design rules. A PLA with 200 transistors was completed and can be used to perform desired logic functions.
Bryant, Christopher D.
"CMOS PLA Layout Generation,"
Journal of the Microelectronic Engineering Conference: Vol. 2
, Article 4.
Available at: https://scholarworks.rit.edu/ritamec/vol2/iss1/4