Currently, the Integrated Circuit Editor (ICE), a CAD I.C. design tool used for layouts at RIT, lacks any design rule checking simulation capabilities. This project involved writing a program that would translate the output file from ICE in the CalTech Intermediate Format (CIF) into a format that would be readable by other software tools, such as design rule checking and circuit node extraction programs.
Kucmierz, Thomas C.
"A Design Tool Software Interface,"
Journal of the Microelectronic Engineering Conference: Vol. 2
, Article 21.
Available at: https://scholarworks.rit.edu/ritamec/vol2/iss1/21