The concept of power reduction is a growing concern in IC design. This article contains the steps taken to redesign a 4-bit microprocessor for lower dynamic power. Measurements are performed of initial power and power consumption after applying new designs. The major reductions for this μP come in the form or logic reduction, transistor stacking, pulse generated latches and width reductions and modifications. Overall the outcome shows a significant amount of energy reduced and the project successfully explored power consumption considerations.
Washer, Steven P.
"Power Reduction in a Microprocessor (May 2010),"
Journal of the Microelectronic Engineering Conference: Vol. 19
, Article 17.
Available at: https://scholarworks.rit.edu/ritamec/vol19/iss1/17