The goal of this project was to examine the low temperature formation of silicon P-N junctions on SOl substrates. P+N and N+P diodes were fabricated with several different dopants at various implant doses. The effects of the silicon thickness were also examined. Existing theories of low temperature phosphorous solid-phase epitaxy (SPE) were verified through this study.
"Low Temperature Junction Formation in Silicon,"
Journal of the Microelectronic Engineering Conference: Vol. 18
, Article 10.
Available at: https://scholarworks.rit.edu/ritamec/vol18/iss1/10