Field effect transistors, in which the sources and drains are made of metal (aluminum), as opposed to silicon, have been conceived, designed, fabricated, and tested. For the n body device, maximum Jon was found to be 74.69μA/μm after a “burn-in” process was performed. For 1V to 10V drain bias, extracted Vtsat values varied between 2.3V and 6.SV, gm between 0.002 and 341μS, sub-Vt slope between 111 and 706mV/dec, and Ion:Ioff between 1.11 and 3.99 decades. The Schottky barrier height was found to be 0.503eV. Additionally, full CMOS operation using one metal for both NFET and PFET operation is proposed and discussed. The long-term goal of the presented device is 3D circuit integration, for which a potential implementation scheme is presented.
Vega, Reinaldo A.
"Metal Source/Drain Schottky Field Effect Transistors - a Proof of Concept,"
Journal of the Microelectronic Engineering Conference: Vol. 14:
1, Article 2.
Available at: https://scholarworks.rit.edu/ritamec/vol14/iss1/2