Abstract

Controlled doping of semiconductor material with high atomic accuracy and minimum defects in silicon is needed for next generation nanoscale and solar devices. The molecular monolayer doping (MLD) strategy is a novel technique based on the formation of self-assembled monolayer of dopant –containing molecule on surface of crystalline silicon, followed by rapid thermal annealing. MLD helps to form damage free junctions which are conformal. It is capable of nanometer scale control of dopant introduction and formation of ultra-shallow diffused profile. MLD can be used for conventional planar devices, FinFETs and nanowires, since both bottom-up and top-down approaches are feasible making it highly versatile. It also finds applications in solar cell industry, to fabricate selective emitters and increases the efficiency of the crystalline silicon solar cell along with reduced contact resistance.

Phosphorus MLD on p-type silicon is formed using diethyl 1-propylphosphonate (DPP) as dopant source in this work. It involved demonstrating the formation of monolayer on silicon piece and 6-inch wafer. The setup is designed, assembled and implemented successfully to achieve monolayer formation on full wafer. The presence of phosphorous on the surface is detected by Auger electron spectroscopy and confirmed by X-ray photoelectron spectroscopy on the same silicon sample. The phosphorous monolayer on the surface is diffused in the silicon surface using rapid thermal anneal at 1000oC for 180 seconds. The diffusion profile is characterized by Secondary ion mass spectrometry (SIMS), spreading resistance profile and sheet resistance measurements. The result show successful creation of diffusion profile with high surface concentration, junction depth of 20 nm extracted at 1 x 1018 cm-3 base doping and sheet resistance is 920 Ω/sq. The total dose of phosphorous in the silicon is dependent on the number of bonds formed using DPP and dose is increased by multiple rounds of MLD and annealing, sheet resistance for double MLD is reduced to 670 Ω/sq. N+P junctions are fabricated using MLD and current-voltage characteristics are measured and analyzed using unified model. It is found that the specific contact resistivity of MLD doped wafer is lower than the implanted wafer. It is also reported that MLD doping can be masked by a thin oxide layer giving a possibility of patterned doping.

Publication Date

7-2017

Document Type

Thesis

Student Type

Graduate

Degree Name

Microelectronic Engineering (MS)

Department, Program, or Center

Microelectronic Engineering (KGCOE)

Advisor

Santosh K. Kurinec

Advisor/Committee Member

Scott Williams

Advisor/Committee Member

Ivan Puchades

Campus

RIT – Main Campus

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