Abstract
This paper examines the behavior of digital logic families, specifically identifying the properties and characteristics of digital fail-safe logic. Fail-safe digital design is examined utilizing classical logic and semiconductor theory. The effects of failures internal to the structure of digital integrated circuits are analyzed and a discussion of pertinent logic design is presented. The techniques to detect all types of multiple failure modes are examined. With these results, a method of design for fail-safe logic is presented and analyzed.
Library of Congress Subject Headings
Logic circuits; Logic design; Digital integrated circuits
Publication Date
1977
Document Type
Thesis
Department, Program, or Center
Microelectronic Engineering (KGCOE)
Advisor
Unknown
Recommended Citation
Becker, Harvey, "The Design of Fail-Safe Logic" (1977). Thesis. Rochester Institute of Technology. Accessed from
https://repository.rit.edu/theses/7411
Campus
RIT – Main Campus
Comments
Note: imported from RIT’s Digital Media Library running on DSpace to RIT Scholar Works. Physical copy available through RIT's The Wallace Library at: TK7868.L6 B42