Abstract
Ray tracing is one technique that has been used to synthesize realistic images with a computer. Unfortunately, this technique, when implemented in software, is slow and expensive. The trend in computer graphics has been toward the use of special purpose hardware, to speed up the calculations, and, hence, the generation of the synthesized image. This paper describes the design and the operation of a systolic based architecture, tailored to speed up the intersection calculations, that must be performed as a part of the ray tracing algorithm.
Library of Congress Subject Headings
Computer graphics--Technique; Algorithms
Publication Date
1987
Document Type
Thesis
Department, Program, or Center
Computer Science (GCCIS)
Advisor
Johnson, Guy
Advisor/Committee Member
Kitchen, Andrew
Recommended Citation
Stankus, Andrea, "Implementing intersection calculations of the ray tracing algorithm with systolic arrays" (1987). Thesis. Rochester Institute of Technology. Accessed from
https://repository.rit.edu/theses/403
Campus
RIT – Main Campus
Comments
Note: imported from RIT’s Digital Media Library running on DSpace to RIT Scholar Works. Physical copy available through RIT's The Wallace Library at: T385.S82 1987