A modular approach, based on work done at Sandia National Laboratories, for the monolithic integration of a microelectrornechanical system (MEMS) process and an electronics process is being investigated. A preliminary outline for an integrated two-level polysilicon MEMS/p-welI CMOS process that can be fabricated in RIT’s facilities has been created. This is a MEMS-first approach that places the MEMS in an isolation trench and then seals off the MEMS during CMOS processing. A recipe based on potassium hydroxide wet etching has been developed for the isolation trench etch. Masks for a simple test chip have been created to assist in troubleshooting all steps related to building MEMS in a recess trench and in successfully making electrical connections to these structures. Photoresist scumming issues related to the process used to pattern the first level of micromechanical polysilicon need to be addressed before subsequent process steps can be fine-tuned.
"Monolithic Integration of MEMs Structures and CMOS Circuitry,"
Journal of the Microelectronic Engineering Conference: Vol. 8
, Article 4.
Available at: http://scholarworks.rit.edu/ritamec/vol8/iss1/4