Process technology for integrated circuit fabrication continues to change and an efficient simulation of process capability must be assured, to avoid time-consuming and costly empirical approaches. Suprem III and MINIMOS are process/device modeling programs that will permit the process/device engineer to accurately simulate complete silicon fabrication technologies. An initial report on these two software packages is given here.
"Advances in Process Modeling at RIT SUPREM III and MINIMOS,"
Journal of the Microelectronic Engineering Conference: Vol. 3
, Article 2.
Available at: http://scholarworks.rit.edu/ritamec/vol3/iss1/2