An electromigration (EM) test mask was designed to utilize both standard ASTM and Standard Wafer-level Electromigration Accelerated Test Structures (SWEAT) fourterminal EM test structures of varying line-widths. The mask was used to pattern 4” test wafers consisting of 300 nm of sputtered aluminum-1% silicon on a thermal SiO2 layer. A custom thermal setup was developed for a Micromanipulator 6000 manual probe station. A new 4” brass chuck was machined to include cooling channels, wafer vacuum, and a thermocouple monitoring system. A resistive ring heater was bonded to the chuck and was controlled via a process temperature controller. Extensive electrical test of interconnect structures was necessary to generate EM lifetime data for the alloy film. Multiple measurements on a given type of test structure were used to generate acceptable sample sizes for mean-time-fail (MTF) statistics. Test data for both ASTM and SWEAT structures demonstrated a lognormal distribution for cumulative failure with a decrease in mean fail time for increased test temperatures. The activation energy for Al-Si at RIT was approximately 0.5 eV for 2.7 μm lines of both types of test structures. A test station and methodology are now in place for future EM lifetime studies to be completed at RIT.
Barron, Lance W.
"Electromigration Testing at RIT: Thermal Test Development,"
Journal of the Microelectronic Engineering Conference: Vol. 15
, Article 9.
Available at: https://scholarworks.rit.edu/ritamec/vol15/iss1/9