Co-integration of Si-based tunnel diodes and CMOS circuits has been proposed for several years as a means to lower power consumption, reduce operating voltage and shrink device count. Recently, the successful integration of Si/SiGe resonant interband tunnel diodes [1,2] with CMOS [3] was demonstrated with room temperature operation. However, integrated circuits realistically operate significantly above room temperature, usually around 373K. Therefore, SPICE models used by circuit designers must account for device performance variations due to temperature changes ranging from 300K to 473K. For circuit applications, the key tunnel diode parameters are the peak and valley current densities (Jp and Jv, respectively) as well as the peak-to-valley current ratio (PVCR). Previous high temperature studies on Si-based Esaki diodes [4-6] and Si/SiGe resonant interband tunnel diodes (RITD) [7] showed some dissimilar trends for PVCR. This study examines the high temperature operation of Si/SiGe RITD more closely up to 473K.

Date of creation, presentation, or exhibit



Proceedings from the 2005 international IEEE Semiconductor Device Research Symposium. ISBN: 1-4244-0083-XNote: imported from RIT’s Digital Media Library running on DSpace to RIT Scholar Works in February 2014.

Document Type

Conference Proceeding

Department, Program, or Center

Microelectronic Engineering (KGCOE)


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