The Si/SiGe RITDs grown by MBE have been monolithically integrated with CMOS for the first time. The integrated devices resulted in a PVCR (peak-to-valley current ratio) of 2.8 at room temperature, showing promise towards the realization of RITD/CMOS circuitry. A RITD-NMOS MOBILE latch has been demonstrated in Si. This logic element enables digital and ternary circuit design for high density storage. The I-V characteristics of the integrated CMOS/RITD devices and ID-VD characteristics of NMOS and PMOS have been studied.

Date of creation, presentation, or exhibit



IEEE conference proceedings of the 2003 international Semiconductor Device Research Symposium. ISBN: 0-7803-8139-4Note: imported from RIT’s Digital Media Library running on DSpace to RIT Scholar Works in February 2014.

Document Type

Conference Proceeding

Department, Program, or Center

Microelectronic Engineering (KGCOE)


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