Power supply noise (PSN) coupling represents a challenge in the design of current and future analog and mixed-signal circuits. This paper studies the impact of PSN coupling on a key analog circuit building block: a voltage reference. A model representing the amount of noise coupling in the frequency domain is developed and verified through simulations. A design solution for increasing high frequency PSN rejection is identified and evaluated. Finally, the effect of technology scaling on PSN is studied in two successive CMOS processes.

Date of creation, presentation, or exhibit



Copyright 2003 IEEE. Personal use of this material is permitted. However, permission to reprint/republish this material for advertising or promotional purposes or for creating new collective works for resale or redistribution to servers or lists, or to reuse any copyrighted component of this work in other works must be obtained from the IEEE. ISBN: 0-7803-8182-3Note: imported from RIT’s Digital Media Library running on DSpace to RIT Scholar Works in February 2014.

Document Type

Conference Proceeding

Department, Program, or Center

Microelectronic Engineering (KGCOE)


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