Many computer vision tasks, such as image understanding, pattern recognition, dynamic scene analysis, etc., can be cast as pipelined algorithms. These tasks can be decomposed into a set of subtasks which are by their nature heterogeneous; at the lowest level, image processing operations have a massive SIMD type of parallelism, while high level image understanding computations exhibit coarse grain MIMD type characteristics. By partitioning the application task onto different machines that communicate via high speed links, each level or stage of processing can be executed simultaneously on the machine to which it is best suited. Such a network of heterogeneous machines may be able to provide a total completion time that is shorter than the execution time that can be obtained by running the entire program on any single machine. In this paper we show that a chain structured parallel or pipelined application task can be efficiently partitioned provided the multiple computer system is composed of two heterogeneous processors.

Date of creation, presentation, or exhibit



Proceedings of the Workshop on Computer Architectures for Machine Perception, pp. 302-311, December 1993 Note: imported from RIT’s Digital Media Library running on DSpace to RIT Scholar Works in February 2014.

Document Type

Conference Proceeding

Department, Program, or Center

Computer Engineering (KGCOE)


RIT – Main Campus