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Documents from 2002

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Efficient Utilization of Fine-Grained Parallelism using a microHeterogeneous Environment, William L. Scheidel

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Reconstructing the Boundary of a Web Document, James Sweet

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Support vector machines for image and electronic mail classification, Matthew Woitaszek

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Size-based adaptive bandwidth allocation: Optimizing the average QoS for elastic flows, Shanchieh Yang and Gustavo de Veciana

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A Parallel implementation of an mpeg-2 encoder using message-passing, Jennifer Zenner

Documents from 2001

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Synthesis of robust controllers for nonsquare multivariable nonlinear systems, Soumitri Kolavennu, Juan Cockburn, and Srinivas Palanki

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Firewall strategies using network processors, Matthew Mariani

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Adaptive virtual protocol stacks for intrusion detection applications, David McGann

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Hardware Implementation of JPEG-LS codec, Michael Piorun

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Bandwidth sharing: The Role of user impatience, Shanchieh Yang and Gustavo de Veciana

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Heterogeneity-aware shortest parh routing: Flow holding time, user demand and network state, Shanchieh Yang, Xun Su, and Gustavo de Veciana

Documents from 2000

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An Evaluation of the S2Ia switched-current architecture for (delta)(sigma) modulator ADCs, Andre Botha

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Geometric computation of value set boundaries, Juan Cockburn and Mario Lopez

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A VHDL design for hardware assistance of fractal image compression, Andrew Erickson

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Digital image watermarking techniques, Christopher Martin

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The Design, modeling and simulation of switching fabrics: For an ATM network switch, Dmitriy Molokov

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An Investigation of thread scheduling heuristics for a simultaneous multithreaded processor, Ralph Zajac Jr

Documents from 1999

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Guaranteed bandwidth implementation of message passing interface on workstation clusters, Ali Atalay

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The Comparison of three 3D graphics raster processors and the design of another, Paul Brown

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Server selection for mobile agent migration, Wayne Caro

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Behavior synthesis for high speed 3D color interpolation using VHDL, Thomas Glanville Jr

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Asynchronous circuit simulation and design methodologies, Michael Hevery

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Self-Similarity in a multi-stage queueing ATM switch fabric, Adam Lange-Pearson

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Relating empirical performance data to achievable parallel application performance, Roy Melton, Cecil Alford, Philip Bingham, and Tsai Huang

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Teaching pipelining and concurrency using hardware description languages, Roy Melton, Tsai Huang, Sudhakar Yalamanchili, and Philip Bighman

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Investigation of a simultaneous multithreaded architecture, Marc Torrant

Documents from 1998

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The Effects of the architectural design, replacement algorithm, and size parameters of cache memory in uniprocessor computer systems, Eric Berzofsky

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Exploring design patterns with the Java programming language, Stephanie Burton

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A Shared memory multiprocessor system architecture utilizing a uniform, Frank Casilio

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Real-time implementation of JPEG encoder/decoder, Thomas Czyszczon, Roy Czernikowski, Muhammad Shaaban, and Kenneth Hsu

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An Approach to remote process monitoring and control, John Dracos

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Design and implementation of a DSP based MPEG-1 audio encoder, Eric Hoekstra

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Evolving hardware with genetic algorithms, Kevin Kerr

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Sliding mode control of I/O linearizable systems with uncertainty, Krothapally Mohan, Juan Cockburn, and Srinivas Palanki

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Lempel Ziv Welch data compression using associative processing as an enabling technology for real time application, Manish Narang

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Coarse-grained parallel genetic algorithms: Three implementations and their analysis, Daniel Pedersen

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Distance learning-How to include laboratory experiments over the internet?, S. Manian Ramkumar

Documents from 1997

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An Investigation and evaluation of promela/spin as a validation tool for asynchronous concurrent systems, Mark Bezdany

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Linear fractional representations of uncertain systems, Juan Cockburn and Blaise Morton

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Commonality of processes underlying visual and verbal recognition memory, Robert Doty and Andreas Savakis

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Optical techniques for parallel image computing, Mary Eshaghain, Sing Lee, and Muhammad Shaaban

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Reactive bandwidth arbitration for priority and multicasting control in ATM switching, Shu-Jen Fang, Yu-Sheng Lin, Shanchieh Yang, and C. Shung

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Java based location independent desktop environment, Jeffrey Harman

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An Experimental analysis of the MPEG compression standard with respect to processing requirements, compression ratio, and image quality, Daniel Howard

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The Teaching of VHDL in computer architecture, Tsai Huang, Roy Melton, Philip Bingham, and Cecil Alford

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Design and evaluation of multimedia extensions for the DLX architecture, Brian Hughes

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A Morphological array image processor controller chip set, Christopher Insalaco

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VLSI design of a priority arbitrator for shared buffer ATM switches, Yu-Sheng Lin, Shanchieh Yang, Su-Jen Fang, and C. Shung

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A Java based internet file system service, Keith Miller

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The Design and modeling of input and output modules for an ATM network switch, Darin Murphy

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VHDL design of a DES encryption cracking system, Thomas Oelke

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Evolution of solutions to real-time problems, Greg Semeraro

Documents from 1996

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A Buffering strategy for stabilizing network data rates, Brian Bell

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A Petri net design, simulation, and verification tool, Richard Brink

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Implementation of a real-time industrial web scanning system hardware architecture, Lowell Ferguson

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A VHDL model of a superscalar implementation of the DLX instruction set architcture, Paul Ferno

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Super scalar high speed 2(mew) N-well MOSIS CMOS digital halftoning processor, Anupam Gupta

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VHDL implementation of an image processing chip, E. Michael Kelly

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A Performance evaluation of several ATM switching architectures, Jeffrey Krieger

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Boundary scan system design, Craig Loomis

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Application of FPA test system technology to commercial inspection/measurement systems, Roy Melton and Cecil Alford

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A VLSI system implementation for real-time object detection, Roy Melton, Cecil Alford, Tsai Huang, and Latika Becker

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The Design of a single chip 8x8 ATM switch in 0.5 micrometers CMOS VLSI, Rudi Rughoonundon

Documents from 1995

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A VHDL model of a digi-neocognitron neural network for VLSI, Troy Brewster

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Statistical SPICE parameter extraction for an n-well CMOS process, Scott Hildreth

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Heat transfer in tissue containing a prevascular tumor, Sophia Maggelakis and Andreas Savakis

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A Transputer-based scalable, parallel global climate change model, Roy Melton, Philip Bingham, Cecil Alford, and Michael Woods

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Integrating CAD tools to design a digital system containing custom and commercial IC chips, Roy Melton, Tsai Huang, Joseph Chamdani, and Cecil Alford

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ASIC design of an IIR digital filter: Using Mentor Graphics DSP Station Tools, Robert Panek

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Features and neural net recognition strategies for hand printed digits, Jeffrey R. Pink

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Implementation of fractal image coding, Peter Stubler

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Characterization of digital film scanner systems for use with digital scene algorithms, Mark Vernacotola

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Simulation of a neural network-driven fuzzy controller, Karl Ver Schneider

Documents from 1994

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A Flexible development system for stepper motor based electro-mechanical subassembly design, Joseph Baco

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A VHDL design of a JPEG still image compression standard decoder, Douglas Carpenter

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A High speed 16-bit RISC processor chip, Wan-Fu Chen

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Fuzzy approach for Arabic character recognition, Adnan El-Nasan

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VHDL modeling and design of an asynchronous version of the MIPS R30000 microprocessor, Paul Fanelli

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Heuristics for selecting gray scale morphological structuring elements, Paul Fetter

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A Hardware approach to neural networks silicon retina, Arif K. Golwalla

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Partitioning of image processing tasks on heterogeneous computer systems, M. Ashraf Iqbal, Saeed Iqbal, and Muhammad Shaaban

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Design and implementation of an asynchronous version of the MIPS R3000 microprocessor, Kevin Johnson

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A Hybrid voice/text electronic mail system: an application of the integrated services digital network, Andrew McBride

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A Transputer based visualization system for parallel meteorological modeling, Roy Melton and Cecil Alford

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Design and implementation of a real-time morphological image processor prototype, Jens Rodenberg

Documents from 1993

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Reliability analysis of triple modular redundancy system with spare, Khalid A. Al-Kofahi

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Simulation of a morphological image processor using VHDL - Part II: Control Mechanism, Hao Chen

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A Selection theory and methodology for heterogeneous supercomputing, Song Chen, Mary Eshaghian, and Ashfaq Khokhar

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Simulation of a morphological image processor using VHDL - Part I: Mathematical Components, Wei-chun Chen

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On structured tangential Nevanlinna-Pick interpolation, Juan Cockburn, Hari Bercovici, Ciprian Foias, and Allen Tannenbaum

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A Self-timed implementation of the bi-way sorter systolic array processor, Mitchell Diamond

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An Extensible, scalable microprocessor architecture, Matthew Dinmore

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A Cluster-M based mapping methodology, Mary Eshaghian and Muhammad Shaaban

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Heterogeneous algorithms for image understanding architecture, Mary Eshaghian, Muhammad Shaaban, J. Greg Nash, and David Shu

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Design for manufacturing: Performance characterization of digital VLSI systems using a statistical analysis/inference methodology, J. Ignacio Espinosa de los Monteros

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Design of a hardware efficient key generation algorithm with a VHDL implementation, James A. Goeke

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Heterogeneous partitioning of chain structured image processing tasks, M. Ashraf Iqbal and Muhammad Shaaban

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Channel routing: Efficient solutions using neural networks, Taj-ul Islam

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Design and implementation of an asynchronous version of the MIPS R3000 microprocessor, Scott Siers

Documents from 1992

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A Constructive solution to the gain-phase margin problem, Juan Cockburn, Yariv Sidar, and Allen Tannenbaum