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Documents from 2000

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Digital image watermarking techniques, Christopher Martin

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The Design, modeling and simulation of switching fabrics: For an ATM network switch, Dmitriy Molokov

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An Investigation of thread scheduling heuristics for a simultaneous multithreaded processor, Ralph Zajac Jr

Documents from 1999

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Guaranteed bandwidth implementation of message passing interface on workstation clusters, Ali Atalay

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The Comparison of three 3D graphics raster processors and the design of another, Paul Brown

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Server selection for mobile agent migration, Wayne Caro

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Behavior synthesis for high speed 3D color interpolation using VHDL, Thomas Glanville Jr

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Asynchronous circuit simulation and design methodologies, Michael Hevery

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Self-Similarity in a multi-stage queueing ATM switch fabric, Adam Lange-Pearson

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Investigation of a simultaneous multithreaded architecture, Marc Torrant

Documents from 1998

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The Effects of the architectural design, replacement algorithm, and size parameters of cache memory in uniprocessor computer systems, Eric Berzofsky

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Exploring design patterns with the Java programming language, Stephanie Burton

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A Shared memory multiprocessor system architecture utilizing a uniform, Frank Casilio

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Real-Time Implementation of JPEG Encoder/Decoder, Thomas M. Czyszczon, Roy S. Czernikowski, Muhammad Shaaban, and Kenneth Hsu

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An Approach to remote process monitoring and control, John Dracos

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Design and implementation of a DSP based MPEG-1 audio encoder, Eric Hoekstra

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Evolving hardware with genetic algorithms, Kevin Kerr

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Lempel Ziv Welch data compression using associative processing as an enabling technology for real time application, Manish Narang

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Coarse-grained parallel genetic algorithms: Three implementations and their analysis, Daniel Pedersen

Documents from 1997

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An Investigation and evaluation of promela/spin as a validation tool for asynchronous concurrent systems, Mark Bezdany

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Java based location independent desktop environment, Jeffrey Harman

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An Experimental analysis of the MPEG compression standard with respect to processing requirements, compression ratio, and image quality, Daniel Howard

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Design and evaluation of multimedia extensions for the DLX architecture, Brian Hughes

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A Morphological array image processor controller chip set, Christopher Insalaco

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A Java based internet file system service, Keith Miller

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The Design and modeling of input and output modules for an ATM network switch, Darin Murphy

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VHDL design of a DES encryption cracking system, Thomas Oelke

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Evolution of solutions to real-time problems, Greg Semeraro

Documents from 1996

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A Buffering strategy for stabilizing network data rates, Brian Bell

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A Petri net design, simulation, and verification tool, Richard Brink

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Implementation of a real-time industrial web scanning system hardware architecture, Lowell Ferguson

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A VHDL model of a superscalar implementation of the DLX instruction set architcture, Paul Ferno

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Super scalar high speed 2(mew) N-well MOSIS CMOS digital halftoning processor, Anupam Gupta

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VHDL implementation of an image processing chip, E. Michael Kelly

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A Performance evaluation of several ATM switching architectures, Jeffrey Krieger

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Boundary scan system design, Craig Loomis

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The Design of a single chip 8x8 ATM switch in 0.5 micrometers CMOS VLSI, Rudi Rughoonundon

Documents from 1995

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A VHDL model of a digi-neocognitron neural network for VLSI, Troy Brewster

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Statistical SPICE parameter extraction for an n-well CMOS process, Scott Hildreth

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ASIC design of an IIR digital filter: Using Mentor Graphics DSP Station Tools, Robert Panek

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Features and neural net recognition strategies for hand printed digits, Jeffrey R. Pink

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Implementation of fractal image coding, Peter Stubler

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Characterization of digital film scanner systems for use with digital scene algorithms, Mark Vernacotola

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Simulation of a neural network-driven fuzzy controller, Karl Ver Schneider

Documents from 1994

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A Flexible development system for stepper motor based electro-mechanical subassembly design, Joseph Baco

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A VHDL design of a JPEG still image compression standard decoder, Douglas Carpenter

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A High speed 16-bit RISC processor chip, Wan-Fu Chen

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Fuzzy approach for Arabic character recognition, Adnan El-Nasan

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VHDL modeling and design of an asynchronous version of the MIPS R30000 microprocessor, Paul Fanelli

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Heuristics for selecting gray scale morphological structuring elements, Paul Fetter

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A Hardware approach to neural networks silicon retina, Arif K. Golwalla

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Design and implementation of an asynchronous version of the MIPS R3000 microprocessor, Kevin Johnson

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A Hybrid voice/text electronic mail system: an application of the integrated services digital network, Andrew McBride

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Design and implementation of a real-time morphological image processor prototype, Jens Rodenberg

Documents from 1993

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Reliability analysis of triple modular redundancy system with spare, Khalid A. Al-Kofahi

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Simulation of a morphological image processor using VHDL - Part II: Control Mechanism, Hao Chen

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Simulation of a morphological image processor using VHDL - Part I: Mathematical Components, Wei-chun Chen

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A Self-timed implementation of the bi-way sorter systolic array processor, Mitchell Diamond

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An Extensible, scalable microprocessor architecture, Matthew Dinmore

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Design for manufacturing: Performance characterization of digital VLSI systems using a statistical analysis/inference methodology, J. Ignacio Espinosa de los Monteros

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Design of a hardware efficient key generation algorithm with a VHDL implementation, James A. Goeke

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Channel routing: Efficient solutions using neural networks, Taj-ul Islam

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Design and implementation of an asynchronous version of the MIPS R3000 microprocessor, Scott Siers

Documents from 1992

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The Design and implementation of an 8 bit CMOS microprocessor, Jeffrey Correll

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A Buffer insertion priority mechanism based on the IEEE 802.4 priority scheme, Nicholas W. Oddo

Documents from 1991

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Optimization algorithms for shortest path analysis, Susan M. Hojnacki

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Design and simulation of a primitive RISC architecture using VHDL, Evangelos Moustakas

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A Parameterized CMOS standard cell library and a full 8-bit grey scale morphological array processor, Lawrence H. Rubin

Documents from 1990

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Transputer-based robot controller, Wei-Chieh Chang

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Design and implementation of a systolic array to solve the Algebraic Path Problem with the specific instance of the transistive and reflexive closure of a binary relation, David Gene McCall

Documents from 1988

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Design and implementation of a simulator for a local area network utilizing an IBM PC/AT or compatible computer, Christian G. Midgley

Documents from 1987

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Design and implementation of a local area network utilizing Intel 310/80286 systems, James Leach