Tunneling devices in combination with transistors offer a way to extend the performance of existing technologies by increasing circuit speed and decreasing static power dissipation. We have investigated Si-based tunnel diodes grown using molecular beam epitaxy (MBE). The basic structure is a p + layer formed by B delta doping, an undoped spacer layer, and an n + layer formed by Sb delta doping. In the n-on-p configuration, low temperature epitaxy (300-370°C) was used to minimize the effect of dopant segregation and diffusion. In the p-on-n configuration, a combination of growth temperatures from 320 to 550°C was used to exploit the Sb segregation to obtain a low Sb concentration in the B-doped layer. Post-growth rapid thermal anneals for 1 min in the temperature interval between 600 and 825°C were required to optimize the device characteristics. Jp , the peak current density, and the peak-to-valley current ratio (PVCR), were measured at room temperature. An n-on-p diode having a spacer layer composed of 4 nm Sio.6Geo.4 , bounded on either side by 1 nm Si, had a Jp = 2.3 kA/cm2 and PVCR = 2.05. A p-on-n tunnel diode with an 8 nm Si spacer (5 nm grown at 320°C, 3 nm grown at 550°C) had a Jp = 2.6 kA/cm2 and PVCR = 1.7.

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Note: imported from RIT’s Digital Media Library running on DSpace to RIT Scholar Works in February 2014.

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Department, Program, or Center

Microelectronic Engineering (KGCOE)


RIT – Main Campus